LCMXO640C-3TN144I FPGA – Huranga Kuaha Whakatakataka Marae 640 LUTS 113 I/0
♠ Whakaahuatanga Hua
| Huanga Hua | Uara Huanga |
| Kaihanga: | Whakawhitiwhiti |
| Kāwai Hua: | FPGA - Huanga Kuaha Whakatakataka Marae |
| RoHS: | Nga korero |
| Rangatū: | LCMXO640C |
| Te maha o nga Huānga arorau: | 640 LE |
| Te maha o nga I/Os: | 113 I/O |
| Ngaohiko Tuku - Min: | 1.71 V |
| Ngaohiko Tukunga - Max: | 3.465 V |
| Paemahana Mahi Iti: | -40C |
| Paemahana Mahi Morahi: | + 100 C |
| Auau Raraunga: | - |
| Te maha o nga Kaituku: | - |
| Kāhua Whakaeke: | SMD/SMT |
| Mōkī/Puhi: | TQFP-144 |
| Tapeke: | Paepae |
| Waitohu: | Whakawhitiwhiti |
| RAM Tohaina: | 6.1 kbit |
| Teitei: | 1.4 mm |
| Roa: | 20 mm |
| Auautanga Mahi Morahi: | 500 MHz |
| makuku tairongo: | Ae |
| Te maha o nga Poraka Huanga Ararau - LAB: | 80 LAB |
| Whakawhiwhinga Whakahaere Naianei: | 17 mA |
| Ngaohiko Whakawhiwhi Mahi: | 1.8 V/2.5 V/3.3 V |
| Momo Hua: | FPGA - Huanga Kuaha Whakatakataka Marae |
| Te Rahi Wheketere: | 60 |
| Kāwairoto: | ICs arorau Papatono |
| Pūmahara Tapeke: | 6.1 kbit |
| Whānui: | 20 mm |
| Taumaha Waeine: | 1.319 g |
Kore-kore, ka taea te whirihora
• Inamata – ka kaha ake i roto i te moroiti
• Kotahi maramara, kaore he mahara whirihoranga o waho e hiahiatia ana
• He pai te haumarutanga hoahoa, kaore he awa moka hei haukoti
• Whakaritea ano i te arorau SRAM i roto i nga mirihakona
• SRAM me te mahara-kore-kore e taea te whakarite ma te tauranga JTAG
• Ka tautoko i nga hotaka papamuri o te mahara kore-kore
Aratau Moe
• Ka taea ki te 100x te whakahekenga o naianei
TransFR™ Whirihoranga Anō (TFR)
• Whakahoutanga arorau i roto i te mara i te wa e mahi ana te punaha
Te I/O teitei ki te Rororau Kiato
• 256 ki te 2280 LUT4s
• 73 ki te 271 I/Os me te maha o nga whiringa kete
• Tautokohia te hekenga kiato
• Taataki kore utu/RoHS rite tonu ki te takai
Mahara Whakamau me te Tohaina
• Tae atu ki te 27.6 Kbits sysMEM™ Poraka Poraka RAM
• Tae atu ki te 7.7 Kbits kua tohatohahia te RAM
• Te arorau mana whakahaere FIFO
Kaipupuri I/O ngawari
• E tautoko ana te buffer sysIO™ ka taea te whakahoahoa te whānuitanga o nga atanga:
– LVCMOS 3.3/2.5/1.8/1.5/1.2
– LVTTL
– PCI
– LVDS, Bus-LVDS, LVPECL, RSDS
sysCLOCK™ PLLs
• Kia rua nga PLL tairitenga mo ia taputapu
• Whakareatia te karaka, whakawehe, me te neke wahanga
Tautoko Taumata Pūnaha
• Paerewa IEEE 1149.1 Matawai Rohe
• Oscillator runga
• Ka mahi nga taputapu ki te 3.3V, 2.5V, 1.8V, 1.2V ranei te hiko hiko
• IEEE 1532 e whai ana i nga kaupapa i roto i te punaha
